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【Intel】Yield Integrator

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发表于 2017-4-18 15:08:37 | 显示全部楼层 |阅读模式
Location: Chengdu! b/ O) I% ^( `' O
Contact: saw.yen.yew@intel.com: v0 a1 `: O, ]0 I2 H& R$ _4 h6 g
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Description
9 d! p! \# m) ZProcess Yield Integrator is responsible for monitoring whole line Process Induced Yield Loss, finding root cause and navigating process improvement plan.( f# Z$ c0 U: M4 r- A; H! V  i) q
Your responsibilities will include but not be limited to
& G' m3 j) a) G" n# D+ ~-Identifying the yield improvement opportunities through Modular Based Problem Solving and managing the yield improvement roadmap.
/ O/ H, ^+ B4 K3 a-Working closely with Technology Development Team/Die Prepare manufacturing/Module/Manufacturing/Material to identify and fix the causes of yield loss 7 k4 G4 g: c: O9 n) O) B
-Actively engage excursion management
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Qualifications! P) n9 @+ n' W6 p, L
You must possess a Master or Bachelor degree in engineering background; Additional qualifications include:
! b0 v9 z% z7 r( L-A good understanding on Assembly/Test process, PCS, Excursion Management, Data Extraction and Data Analysis Tools. 2 V/ x. ^3 b/ B1 {6 k' U/ y
-Demonstrated strong problem-solving skills   o/ R5 x* @  D. ?, x7 K
-Good analytical capabilities as well as a solid teamwork orientation and outstanding communication skills 1 c/ z0 u& v4 k% d* `  ^" f, m: w$ \
-Self-motivated, reliable to deliver on time, a quick-thinker, be able to work in a fast-paced work environment 5 d5 P! j0 E% t. d% k# v
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This is a full time college graduate position. It’s suitable for student who is going graduated in Y16 or Y17.
- e) `- H4 v8 M; F6 PPlease subject your email as ‘Yield Integrator_Chengdu’ when applying to saw.yen.yew@intel.com# U- C1 A& O( G2 b5 e% d
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