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【Intel】Yield Integrator

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发表于 2017-3-25 21:13:04 | 显示全部楼层 |阅读模式
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Location: Chengdu
: o- Q( n# W7 ^, I0 S0 q- ]Contact: saw.yen.yew@intel.com
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7 X" n& x8 v4 s( W9 kDescription; g: |2 X1 W' S
Process Yield Integrator is responsible for monitoring whole line Process Induced Yield Loss, finding root cause and navigating process improvement plan.0 j4 T! Z$ ]4 M4 J; _+ A
Your responsibilities will include but not be limited to 1 L* f' a7 l$ P, e  V1 ]: B
-Identifying the yield improvement opportunities through Modular Based Problem Solving and managing the yield improvement roadmap. ( o. _0 u( O8 v  k1 \* \
-Working closely with Technology Development Team/Die Prepare manufacturing/Module/Manufacturing/Material to identify and fix the causes of yield loss ; F. E7 ^4 T. w" Y& ]8 B
-Actively engage excursion management
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( W' @: y$ b" l9 v3 sQualifications/ M! @6 b# t7 K# W* S" Q
You must possess a Master or Bachelor degree in engineering background; Additional qualifications include: 9 L) o5 ~6 H$ F) Q9 R
-A good understanding on Assembly/Test process, PCS, Excursion Management, Data Extraction and Data Analysis Tools. 8 a+ C# n: y& S* y" Y( ~, g
-Demonstrated strong problem-solving skills
+ C1 C6 e$ }5 E2 S  Q! |$ X9 s" }-Good analytical capabilities as well as a solid teamwork orientation and outstanding communication skills 6 H7 u- M' b  b; K7 x3 y
-Self-motivated, reliable to deliver on time, a quick-thinker, be able to work in a fast-paced work environment 3 A5 R3 F. j3 u0 T" S
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This is a full time college graduate position. It’s suitable for student who is going graduated in Y16 or Y17.
7 s/ V+ c, [7 X8 j0 S6 C- `3 ZPlease subject your email as ‘Yield Integrator_Chengdu’ when applying to saw.yen.yew@intel.com1 J5 J" g. U" j* B, o
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