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【Intel】Yield Integrator

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发表于 2017-3-25 21:13:04 | 显示全部楼层 |阅读模式
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Location: Chengdu
- j3 L: }0 X) mContact: saw.yen.yew@intel.com
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Description% q3 A+ T# n3 O  Q$ H8 b  |" X
Process Yield Integrator is responsible for monitoring whole line Process Induced Yield Loss, finding root cause and navigating process improvement plan.1 x7 i7 H& U  v0 Q: V
Your responsibilities will include but not be limited to 8 [; z% ~4 A  a/ \
-Identifying the yield improvement opportunities through Modular Based Problem Solving and managing the yield improvement roadmap.
( g. d0 O/ s6 X, S1 x-Working closely with Technology Development Team/Die Prepare manufacturing/Module/Manufacturing/Material to identify and fix the causes of yield loss , U/ b  M/ @4 r# m9 v' ]) |
-Actively engage excursion management
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- x% x+ @" J$ x1 p" z; W7 M" sQualifications
; m! h. l+ C# B+ K6 b4 h. q* q* \You must possess a Master or Bachelor degree in engineering background; Additional qualifications include: " M" D8 J: W% p5 q! z; J
-A good understanding on Assembly/Test process, PCS, Excursion Management, Data Extraction and Data Analysis Tools. - J7 t0 c/ z% E; H% e! F# }  X
-Demonstrated strong problem-solving skills 0 s- Y6 w2 ~% b
-Good analytical capabilities as well as a solid teamwork orientation and outstanding communication skills 5 z; E: U/ ^" t6 E4 c% g/ x
-Self-motivated, reliable to deliver on time, a quick-thinker, be able to work in a fast-paced work environment
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2 m5 Q0 M. ]  OThis is a full time college graduate position. It’s suitable for student who is going graduated in Y16 or Y17.7 |/ C" F8 @$ a3 T
Please subject your email as ‘Yield Integrator_Chengdu’ when applying to saw.yen.yew@intel.com1 n/ N% y- t& T7 q
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